One of the major reasons that nanoimprint and maskless lithography are behind EUV is that early in the development of next generation lithography tools Intel and a few other large companies made sure that most of the resources were funneled to EUV. Nanoimprint and maskless technologies were ignored and starved. Over the last several years there has been so much money and effort thrown at EUV tool and process development that it has become "too big to fail".
Earlier this month DNP announced the purchase of a semiconductor 6025 mask replication tool from Molecular Imprints that uses nanoimprint lithography, making good on the article you wrote in July 2009 (http://www.eetimes.com/electronics-news/4083666/DNP-MII-devise-nano-imprint-mask-technology). They say NIL is progressing to pilot production for semi. Why not follow up and get the latest news from these folks?
Nano-imprint and maskless are behind EUV. We have covered these topics extensively. Nano-imprint is not ready for prime time in semis. Not sure it will ever work for semis. Maskless or ML2 is still science fiction.
Given the challenges, uncertainty and expense still to come for EUV, I do not understand why other next-gen technologies are not mentioned in such a discussion. What is the status of nanoimprint lithography and maskless writing?
Simple economics says $125M/tool is not a plausible solution.
If they had one bad generation of tools just at the time it was most needed, that is enough to set them back, as the next time, customers would have some doubts. I suspect this happened with their last dry ArF tool. So they couldn't recover enough business in the immersion stage.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.