When you say "these machines will have been shipped to customers by mid-2011" you mean production worth tool or tool will be sent to R&D site ?
If its R&D then I think there is still long way to go before EUV era begins.
As mentioned earlier, EUV was originally intended for 100 nm and now can only be targeted for 10 nm or less. This is an order of magnitude or more tighter requirements. But the tools did not improve an order of magnitude. At the same time, the 193 nm wavelength was able to cover this entire range. So the relevance of wavelength selection is disappearing quickly.
First. I see, that the future of EUV is adequate beyond 10-14nm resolution. Indeed, if we use short, one-pulse laser many-beams lithography tool plus nonlinear sofisticated resists as a part on wafer image formation process we will have this.
Second. We will use non-traditional logic before charge transmission, Imean tha the wawe function will going between some logic elements based on QD. The nuts of this I see that we can use one step lithography on layer of metallization. Otherwords, we can make fully flat logic. The idea this logic based on researrchers form France, but realisation, as I suppose, fully new.
Since memory structures are approaching 4F^2 shape factor, this can be accommodated by crossed line patterning with spacers. For logic, the use of incrementally increasing exposures is already the default plan. So the industry will go on as usual. Introducing EUV at 22 nm is already much harder than the original plan to introduce at 100 nm. But it's already too late for 22, and even 15 nm.
Blog Doing Math in FPGAs Tom Burke 23 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...