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Kinnar
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re: Inside Samsung's 30-nm-class, 'green' DDR3 SDRAM
Kinnar   2/4/2011 4:05:50 PM
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Samsung has shrinked the memory a lot still maintaining the specification of the DDR3 unaltered it is a great achievement, this will lead towards packing more memory in the same formfactor.

Dick James
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re: Inside Samsung's 30-nm-class, 'green' DDR3 SDRAM
Dick James   2/3/2011 2:38:02 PM
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I'm blowing the EIQ trumpet, but check out http://www.electroiq.com/index/Semiconductors/sst-blogs/chipworks-blog-display/blogs/sst-blogs/chipworks/post987_3596488420747370540.html for plan-view images and more discussion.

yalanand
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re: Inside Samsung's 30-nm-class, 'green' DDR3 SDRAM
yalanand   2/3/2011 3:56:19 AM
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Why Samsung did not follow the existing naming guidelines? They are trying to create confusion by coming up with their own naming convention. I guess all the chip manufacturers should also append to letters to their naming convention 1) AA - Above world wide average 2) BA - Below world wide average. This will give clear picture if the shrink is real or just hypothetical.

resistion
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re: Inside Samsung's 30-nm-class, 'green' DDR3 SDRAM
resistion   2/2/2011 4:43:06 PM
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Ok thx Destro, but I may not go so far as to buy them.

DestroCom
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re: Inside Samsung's 30-nm-class, 'green' DDR3 SDRAM
DestroCom   2/2/2011 4:00:11 PM
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I think they sell the top-level images. You might want to contact the authors directly.

resistion
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re: Inside Samsung's 30-nm-class, 'green' DDR3 SDRAM
resistion   2/2/2011 1:16:09 PM
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Interestingly, this can also be considered equivalent to a 4F^2 cell with F=46 nm. I wonder if they could not directly pattern at the 38 nm 6F^2 design rule. Still, they could have done something like 42 nm and still get cost advantage.

resistion
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re: Inside Samsung's 30-nm-class, 'green' DDR3 SDRAM
resistion   2/2/2011 12:46:51 PM
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Using F=30 nm, this is a 9.4 F^2 cell area.

resistion
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re: Inside Samsung's 30-nm-class, 'green' DDR3 SDRAM
resistion   2/2/2011 7:55:32 AM
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Is there a top view available for the cells?



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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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