We likewise felt a good vibe from DesignCon this year. The crowds flocking to papers and panels related to jitter and de-embedding, with many sold out, was good to see. This reflects on a need to solve challenges that are beginning to emerge as our customers grapple with 8+ Gb/sec signaling on FR-4 circuit boards.
From a signal integrity perspective, discussions revolved around accurate de-embedding practices and how to perform them with confidence. Questions/comments like; S Parameters from a Vector Network Analyzer or a Time Domain Reflectometry methodology? Where and how to take the measurement? What role does probing play? Do the models reflect reality? The industry is looking for direction – and found lots of it at DesignCon.
At the Tektronix booth, our most popular displays and demos centered around Gen 3 serial standards like PCI Express 3.0 and 10G Ethernet. From the buzz and traffic, it’s clear that technology is advancing – along with the challenges.
Chris Loberg, Tektronix
Blog Doing Math in FPGAs Tom Burke 6 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...