Breaking News
Comments
Newest First | Oldest First | Threaded View
docdivakar
User Rank
Manager
re: ISSCC: China eyes petaflops, IBM hits 5 GHz
docdivakar   2/28/2011 11:09:15 PM
NO RATINGS
@RickMerrit: thanks for the writeup, didn't see you at the Computer History Museum for the 40th Anniversary of Spice event (most ISSCC attendees made it there!). I wonder why IBM isn't using their Power7 platform to push the clock speeds instead of the z196. The Power6 older generation was already clocking at 4.5GHz whereas Power7 had already reached 5.0GHz (8-core version?). The Power7 also has a L3 cache of 32Mb max. MP Divakar

rpcy
User Rank
Rookie
re: ISSCC: China eyes petaflops, IBM hits 5 GHz
rpcy   2/24/2011 2:05:20 PM
NO RATINGS
I strongly suspect Rick is right. Out of order techniques don't yield 40% perf improvements across the board, all by themselves. 20 - 25%, maybe. How well the compiler understands the new, complex microarch is another strong factor. After that you have cache design, bus design, policies on TLB usage, provisions for coherence, and how aggressive you were on lots of other things.

rick merritt
User Rank
Author
re: ISSCC: China eyes petaflops, IBM hits 5 GHz
rick merritt   2/22/2011 10:43:54 PM
NO RATINGS
Just to clarify, I believe it is 40% overall performance benefit from a combo of all technqiues used including out-of-order pipeline, 18% freq incrrease and etc.

krisi
User Rank
CEO
re: ISSCC: China eyes petaflops, IBM hits 5 GHz
krisi   2/22/2011 9:02:07 PM
NO RATINGS
thank you Joel, sounds that 40% improvement due to out-of-order design is more important than 18% due to faster process. Can someone explain how out-o-order works? dr Kris

jederrick
User Rank
Rookie
re: ISSCC: China eyes petaflops, IBM hits 5 GHz
jederrick   2/22/2011 7:32:19 PM
NO RATINGS
Actually it is good to see an edging up on the frequency. The move to an out-of-order design (40% improvement) is a key advancement along with an increase of 18% in frequency. I would expect the frequency might edge up a little more over time with the same basic design, but the "step" function of 40% for OOE is the kicker.. I actually know something about both projects, ex-IBMer and ex-MIPS executive..

selinz
User Rank
CEO
re: ISSCC: China eyes petaflops, IBM hits 5 GHz
selinz   2/22/2011 7:30:33 PM
NO RATINGS
Mmm. I look at going from 4.4 to 5.2 as an impressive jump. Particularly with approximately the same power...

krisi
User Rank
CEO
re: ISSCC: China eyes petaflops, IBM hits 5 GHz
krisi   2/22/2011 12:38:30 AM
NO RATINGS
18% of speed improvements by moving from 65nm to 45nm process node? That must be disappointing. Will we ever see 10 GHz processors? Kris



EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Max Maxfield

Aging Brass: Cow Poop vs. Horse Doo-Doo
Max Maxfield
46 comments
As you may recall, one of the things I want to do with the brass panels I'm using in my Inamorata Prognostication Engine is to make them look really old. Since everything is being mounted ...

EDN Staff

11 Summer Vacation Spots for Engineers
EDN Staff
18 comments
This collection of places from technology history, museums, and modern marvels is a roadmap for an engineering adventure that will take you around the world. Here are just a few spots ...

Glen Chenier

Engineers Solve Analog/Digital Problem, Invent Creative Expletives
Glen Chenier
15 comments
- An analog engineer and a digital engineer join forces, use their respective skills, and pull a few bunnies out of a hat to troubleshoot a system with which they are completely ...

Larry Desjardin

Engineers Should Study Finance: 5 Reasons Why
Larry Desjardin
45 comments
I'm a big proponent of engineers learning financial basics. Why? Because engineers are making decisions all the time, in multiple ways. Having a good financial understanding guides these ...

Flash Poll
Top Comments of the Week
Like Us on Facebook
EE Times on Twitter
EE Times Twitter Feed

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)