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rfab
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re: Updated: Samsung fabs Apple A5 processor
rfab   3/13/2011 1:56:30 PM
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Is entirely speculation, APPLE's Samsung SOC design, foundry TSMC has not showed

rfab
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re: Updated: Samsung fabs Apple A5 processor
rfab   3/13/2011 1:53:44 PM
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Starting from 2007, the Taiwanese rumor many times, what is OEM XBOX CPU, OEM ATOM, OEM INTEL chipset, OEM A5, a result of a bankruptcy can be seen from here in the downhill TSMC

mark.lapedus
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re: Updated: Samsung fabs Apple A5 processor
mark.lapedus   3/13/2011 7:18:06 AM
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I don't have to wait. The cat (TSMC) is out of the (Apple) bag.

rick merritt
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re: Updated: Samsung fabs Apple A5 processor
rick merritt   3/13/2011 6:16:04 AM
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Guess we'll have to wait for the teardown of the iPad 3 to find out if that comes to pass ;-)

mark.lapedus
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re: Updated: Samsung fabs Apple A5 processor
mark.lapedus   3/13/2011 6:05:14 AM
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Samsung made the first A5 chips. Then, however, TSMC will reportedly ramp the A5 in Q3 or Q4, according to sources. TSMC could be a second source to Samsung for the 45- and 40-nm version. Then, TSMC will fab the 28-nm version, sources said.

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michigan0 Sang Kim First, 28nm bulk is in volume manufacturing for several years by the major semiconductor companies but not 28nm FDSOI today yet. Why not? Simply because unlike 28nm bulk the LDD(Lightly Doped Drain) to minimize hot carrier generation can't be implemented in 28nm FDSOI. Furthermore, hot carrier reliability becomes worse with scaling, That is the major reason why 28nm FDSOI is not manufacturable today and will not be. Second, how can you suppress the leakage currents from such ultra short 7nm due to the short channel effects? How thin SOI thickness is required to prevent punch-through of un-dopped 7nm FDSOI? Possibly less than 4nm. Depositing such an ultra thin film less then 4nm filum uniformly and reliably over 12" wafers at the manufacturing line is extremely difficult or not even manufacturable. If not manufacturable, the 7nm FDSOI debate is over!Third, what happens when hot carriers are generated near the drain at normal operation of 7nm FDSOI? Electrons go to the positively biased drain with no harm but where the holes to go? The holes can't go to the substrate because of the thin BOX layer. Some holes may become trapped at the BOX layer causing Vt shift. However, the vast majority of holes drift through the the un-dopped SOI channel toward the N+Source,...
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