Where can we check the requirements for ONFI3(4) PHY and controller? Particularly during PHY design we need to know which of the mentioned blocks (PHY vs Controller) handles the asynchronous timing relationships between ALE, CLE, WE_n, DQ, etc. in NV-DDR2/3 modes? Any input would be appreciated.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.