For an outstanding overview of mobile processors (three articles) I suggest the in-depth market and technology analyses by Dr. Lj. Ristic, a leading expert on wireless mobile markets, in today’s DigiTimes
Regarding future LTE chipsets -- the race is on again among the chip vendors for the optimized solutions. So, what should the LTE chipset solution look like?
Qualcomm has done a very good job with its line of Snapdragon products for 3G but that will not be a favorite solution for LTE. Qualcomm is currently offering Snapdragon in combination with separate LTE phone modem (that is, BB) as a solution which points out to redundancies and -- higher cost.
I firmly believe that in the next couple of years, independently of who the vendor is, an optimized LTE solution will include minimum of three separate chips: baseband processor, transceiver chip, and application processor with integrated GPU. The set of challenges between these complex chips (and each one is complex) is unique enough that they need to be optimized separately for performance and cost.
The 3G baseband processors are currently at the 65 nm node. The LTE baseband processors need to offer multimode operation and be backwards compatible. They also need to offer LTE data rates. Because of this they will move down to 45/40 nm node and offer optimized solution as standalone BB processors.
The leading 3G transceivers are also currently at the 65 nm node and a good portion of them even at the higher (older) nodes. The complexity of LTE transceivers goes up because of the need to perform in multimode and additional bands and their optimization will also be best done as separate chips. They will slightly lag basebands and stay at the 65 nm node in the next 2-3 years and then move down to the 45/40 nm node.
The application processors, to complement above two chips for the LTE solution, will be standalone multi-core application processors with integrated (and multi-core) GPU on the same chip. The optimization of application processors is independent of WWAN standards and it is focused on multimedia experience of users and on running of operating system. Current leading solutions of application processors are becoming multi-core processors running at 1GHz and above. They are already made in the 45/40 nm node and as multi-core processors they will be moving to the 32/28 nm in the next two years.
It should be pointed out that in order to offer a full LTE solution one needs to include power management unit (PMU). The power management chip will exist for some time in two forms, as a separate chip or be integrated with baseband, depending on vendor’s philosophy. With this in mind the full LTE chipset solution will have three to four ICs. However, it is to expect that additional integration will be done at the package level leveraging advances in packaging technology and the final form factor will have two or three packages.
In conclusion and once again - for an outstanding overview of mobile processors (three articles), including of baseband processors, please see the in-depth market and technology analyses by Dr. Lj. Ristic, a leading expert on wireless mobile markets, in today’s DigiTimes
For those of you who are in the Silicon Valley, there is an IEEE seminar that is both timely and relevant to the topic of this article:
"Evolution Status and New Developments in WiFi, 3G, and LTE from a Silicon Perspective." The speakers are: Michael Hurlston, Senior VP and General Manager for Broadcom, and, Je Woo Kim, VP of Technology at Qualcomm.
The seminar starts at 6:00PM on 11th May, open for all to attend; here is the registration site:
Please RSVP if you are attending ASAP.
Dr. MP Divakar
More about the May 11th IEEE ComSocSCV Qualcomm and Broadcom event in Santa Clara, CA:
RSVP and logistics along with our June 8th meeting announcement at: www.comsocscv.org
You can also read about tomorrow's ComSocSCV meeting at:
Backgrounder at: http://community.comsoc.org/blogs/ajwdct/evolution-status-and-new-developments-wifi-3g-and-lte-silicon-perspective-may-11-comsoc
@sranje: thank you for your inputs, makes it a lively discussion. It would seem from your summary that there will be multiple chips with different technology nodes to realize a "chipset" solution; seems like integrating with Si interposers for a 2.5D packaging solution is the fastest way to realize this than a full 3D stacked chip / package solution.
Dr. MP Divakar