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PHW_#1
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re: Intel tips 22-nm tri-gate, but mobile is MIA
PHW_#1   5/5/2011 6:24:20 AM
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TSMC not IBM/GF (even more behind) can only achieve Intel's 45nm high k/metal gate specs. Not to mention intel's 2nd generation high k/metal gate spec. So we are talking 2 generation gap. 3D FINFET is a brandnew design flow, I am wondering whether design community is ready to handle such technology.

PHW_#1
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re: Intel tips 22-nm tri-gate, but mobile is MIA
PHW_#1   5/5/2011 6:20:05 AM
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another great innovation.

rfab
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re: Intel tips 22-nm tri-gate, but mobile is MIA
rfab   5/5/2011 3:12:07 AM
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TSMC Chairman Morris Chang said at the meeting in the first quarter of France, said TSMC 28 nanometer low-power (LP) process and high performance (HP) process reliability verification operations have been completed, which means that the company's 28 Chennai M the mass production process is no longer any obstacles the road, in the TSMC advanced process of development, is a very important milestone. -------- originally clamored for so many years of 28NM, production does not

sxs537
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re: Intel tips 22-nm tri-gate, but mobile is MIA
sxs537   5/4/2011 9:13:20 PM
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I meant "2X performance advantage on the core side"....sorry for the typo

sxs537
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re: Intel tips 22-nm tri-gate, but mobile is MIA
sxs537   5/4/2011 9:12:01 PM
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Says Who?? IBM/GF/TSMC etc are just starting their 32/28nm and then they indicated that they would be ready with 3D transistors at 14 nm node. So they have to go through a 22/20 nm node in between before they get there. Intel has atleast a 3-4 year advantage if not more. Also ARM architecture is inherently more power efficient since it is designed that way (low power with commensurate performance hit). They are successful because they can do an SoC (the whole ecosystem) better than Intel currently does. So ARM should be very concerned by this.... not that they cannot compete but Intel now is in the same power envelope and has atleast a 2X power advantage on the core side. Whether Intel can execute to the whole SoC part is the question. They did acquire pieces (like comms with Infinieon and graphics) in the last year or so. The space is now really interesting.

markhahn0
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re: Intel tips 22-nm tri-gate, but mobile is MIA
markhahn0   5/4/2011 8:35:24 PM
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multigate is great, but IBM/AMD/TSMC are surely quite close to production as well. since everyone will have 3d/multigate in about the same timescale, including foundries producing ARM, it's hard to see how this gives Intel any significant advantage. after all, ARM has a _design_ advantage in performance-for-power, which Intel can't catch up with via a transient fab upgrade...

resistion
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re: Intel tips 22-nm tri-gate, but mobile is MIA
resistion   5/4/2011 7:01:48 PM
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Well something's gotta give. If the fins are spaced too close, the thick gate would be squeezed in between, which would be a new complication.

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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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