Embedded Systems Conference
Breaking News
Comments
Newest First | Oldest First | Threaded View
KarlS
User Rank
Author
re: SoC realization: Finally the “Killer App” that will allow EDA to grow again?
KarlS   5/13/2011 8:45:15 PM
NO RATINGS
Use of IP in an SoC is analogous to OOP, so much can be taken from OOP software development. The EDA tools today do nothing to assist the designer in the early stages, but rather seem to assume that the design is complete at day one. So synthesis optimization is part of the first compile when the design is not complete so it will throw away anything that is not totally connected then only says "sy6nthesized away these nodes". On the other hand an OOP compiler gives meaningful error messages. Another thing the OOP source editor provides selectable information for classes and methods at entry time. HDL source editors offer absolutely no help. Real chips are made up of and/or/invert, not if/else/case/always. The IP should be defined as a class so it can be compiled/instantiated along with the software in the system design. Then the function should be mapped onto the chip. Since the IP class would have been derived from the hardware design, it would be a matter of instantiating the IP modules.

bigtallsimon
User Rank
Author
re: SoC realization: Finally the “Killer App” that will allow EDA to grow again?
bigtallsimon   5/12/2011 1:25:59 PM
NO RATINGS
@ahshabazz Uncanny timing - exactly my point but 3 minutes sooner!

bigtallsimon
User Rank
Author
re: SoC realization: Finally the “Killer App” that will allow EDA to grow again?
bigtallsimon   5/12/2011 1:23:02 PM
NO RATINGS
Food for thought. Your point about risk introduced by having at least two distinct teams (software at one end and silicon implementation at the other) is an important one. I agree that the hard boundaries drawn between the 'hardware' team and the 'software' team make it easy for cracks to open up - cracks which unrecorded architectural requirements or assumptions get lost in. A breed of SoC engineer that understands the big architectural picture, the tools and techniques used at each stage and the methodologies for keeping the implementation in line with the system-level models would be of great value. Until there is a critical mass of such engineers, I wonder if the best tools in the world can be readily adopted...?

ahshabazz
User Rank
Author
re: SoC realization: Finally the “Killer App” that will allow EDA to grow again?
ahshabazz   5/12/2011 1:20:45 PM
NO RATINGS
I think the problem with turnover in the US markets being so high, where are you going to find someone with the incredible depth and specialization to manage these tools when they come along?

old account Frank Eory
User Rank
Author
re: SoC realization: Finally the “Killer App” that will allow EDA to grow again?
old account Frank Eory   5/11/2011 2:37:05 PM
NO RATINGS
Excellent article! What you call "SoC Realization" is indeed an area where EDA can and must provide new solutions to bridge that gap between system definition and chip implementation.



Top Comments of the Week
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Martin Rowe

Leonard Nimoy, We'll Miss you
Martin Rowe
2 comments
Like many of you, I was saddened to hear the news of Leonard Nimoy's death. His Star Trek character Mr. Spock was an inspiration to many of us who entered technical fields.

Max Maxfield

Awesome 3D Electronic Sculptures
Max Maxfield
13 comments
I recently received an email from someone we'll call Martin (because that's his name). Martin's message was short and sweet. In its entirety it read: "You need to see this!"

Rajaram Regupathy, Cypress Semiconductor

Add USB Battery Charging Protocols to an Android-Based Design
Rajaram Regupathy, Cypress Semiconductor
Post a comment
Editorial Note: Excerpted from Unboxing Android: A hands on approach with real world examples, by Rajaram Regupathy, the author takes you through the process incorporating effective power ...

Rich Quinnell

Making the Grade in Industrial Design
Rich Quinnell
16 comments
As every developer knows, there are the paper specifications for a product design, and then there are the real requirements. The paper specs are dry, bland, and rigidly numeric, making ...

Special Video Section
The LT8640 is a 42V, 5A synchronous step-down regulator ...
The LTC2000 high-speed DAC has low noise and excellent ...
How do you protect the load and ensure output continues to ...
General-purpose DACs have applications in instrumentation, ...
Linear Technology demonstrates its latest measurement ...
10:29
Demos from Maxim Integrated at Electronica 2014 show ...
Bosch CEO Stefan Finkbeiner shows off latest combo and ...
STMicroelectronics demoed this simple gesture control ...
Keysight shows you what signals lurk in real-time at 510MHz ...
TE Connectivity's clear-plastic, full-size model car shows ...
Why culture makes Linear Tech a winner.
Recently formed Architects of Modern Power consortium ...
Specially modified Corvette C7 Stingray responds to ex Indy ...
Avago’s ACPL-K30T is the first solid-state driver qualified ...
NXP launches its line of multi-gate, multifunction, ...
Doug Bailey, VP of marketing at Power Integrations, gives a ...
See how to ease software bring-up with DesignWare IP ...
DesignWare IP Prototyping Kits enable fast software ...
This video explores the LT3086, a new member of our LDO+ ...
In today’s modern electronic systems, the need for power ...
Radio
LATEST ARCHIVED BROADCAST
EE Times Senior Technical Editor Martin Rowe will interview EMC engineer Kenneth Wyatt.
Flash Poll