Breaking News
Comments
Newest First | Oldest First | Threaded View
docdivakar
User Rank
Manager
re: On the road: DAC diversifies, caters to core audience
docdivakar   6/23/2011 10:24:36 PM
NO RATINGS
As far as EDA market is concerned, until there is an integrated flow there won't be a large market for 3D tools. The existing tools will be brute-forced to get by!. I would argue the 2.5D using Si interposers will lead the market for a while, till TSV-enabled multiple stacks of substrates become commonplace. The drivers for these are several: 1. There is simply not enough space to connect chip packages with a large number of I/O's to the board -the design rules in board layout are limiting, most at 3mil width/spacing. So multiple dice have to co-habit the same substrate in a BGA package. This chip-to-chip driver interconnecting will drive a number of communication IC products for a foreseeable future. This is where the Xilinx's, Altera's will put their effort as you also note. 2. Diminishing latency budget in chip-to-chip communication: examples abound in 40G/100G backplane market, another driver for integrating multiple substrates of IC's that interconnect with each other and are challenged by the prop delays by having to go thru a long, challenging paths. Si interposers provide the most optimum way to interconnect between chips. 3. Integration of passives, including planar magnetics: inductors and capacitors for bypassing / decoupling, power management functions, etc., are easier to to implement with Si interposers. Dr. MP Divakar

old account Frank Eory
User Rank
Rookie
re: On the road: DAC diversifies, caters to core audience
old account Frank Eory   6/12/2011 10:01:34 PM
NO RATINGS
3-D integration, TSVs and stacked die are a huge new area of opportunity for EDA. As these become more common, we designers need EDA solutions to help us ensure 1st pass success with system-in-package (SIP) solutions. The mechanical engineering issues (heat transfer, etc.) are right up there with the traditional electrical issues (timing, signal integrity) that tools need to attack. Not every IC package will contain a single 28 nm or 32 nm die -- this is quite clear from the economics. But those multi-die packages that for some applications are the most cost-effective solution need a lot more EDA support that exists today.

Kinnar
User Rank
CEO
re: On the road: DAC diversifies, caters to core audience
Kinnar   6/10/2011 8:29:21 PM
NO RATINGS
EDA tools will be having a lot research and development due to the IPs, After reading through the glimpses of the DAC it seems that there are many lookouts to be catered in future.



EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Max Maxfield

Steve Wozniak Reacts to Latest iPhone
Max Maxfield
8 comments
Funnily enough, just a few days ago as I pen these words, I was chatting with my wife (Gina the Gorgeous) when she informed me that -- as a kid -- she had never played at making a ...

EDN Staff

11 Summer Vacation Spots for Engineers
EDN Staff
20 comments
This collection of places from technology history, museums, and modern marvels is a roadmap for an engineering adventure that will take you around the world. Here are just a few spots ...

Glen Chenier

Engineers Solve Analog/Digital Problem, Invent Creative Expletives
Glen Chenier
15 comments
- An analog engineer and a digital engineer join forces, use their respective skills, and pull a few bunnies out of a hat to troubleshoot a system with which they are completely ...

Larry Desjardin

Engineers Should Study Finance: 5 Reasons Why
Larry Desjardin
46 comments
I'm a big proponent of engineers learning financial basics. Why? Because engineers are making decisions all the time, in multiple ways. Having a good financial understanding guides these ...

Flash Poll
Top Comments of the Week
Like Us on Facebook
EE Times on Twitter
EE Times Twitter Feed

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)