Analog decoders for codes like Turbo and LDPC codes have been studied for over 10 years in academia and there were some impressive silicon demonstrations, and even few startups were founded but all of them failed eventually.
Error Correction of waveforms is conventionally performed by digitizing that waveform (using an ADC) then applying a 'soft decision' error correction algorithm to the quantized waveform levels.
It is a cute trick to perform the whole error correction algorithm using an 'analog computer' that relies upon the I-V relationships of the transistors. The big question is whether or not this offers any kind of advantage to the 'digital computer' approach, particularly on sub-micron CMOS.
Good report Junko, thanks.
Lyric has apparently met with difficulty in finding design wins for their technology. This is not uncommon for something that is "completely different" from the status quo.
Applying it to NAND-Flash memory for error correction using Low Density Parity Codes[LDPC]is an appealing mass market application. Why Lyric was not successful here would be an interesting story by itself. It will be interesting to follow where ADI applies Lyric's technology - that is if that information is "allowed" to be made public...,
Highly parallel architecture is advantageous in all the applications because they are fast. So more of the probability mathematics can be applied and tested in real time for improved performance.Lyric worked on this for 5 years and won.
Blog Doing Math in FPGAs Tom Burke 3 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...