3D scaling could be important if there is high interdependence between the operations of each CPU, but I maintain that we may have to build new computing models to really take advantage of systems built around CPUs like this. Separate memory for each processor is a good start, since it relieves the bottleneck of access to shared memory. Data centers are a good application for this, because they often work on large numbers of independent transactions. By the way, we may also have to look at the nomenclature. I just realized that this isn't really a Central Processing Unit (CPU). It's more like a Central Processing Pool (CPP?). For that matter, is the 'processor' the chip or each of the sections of it? The same word is used for both in this article.
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.