Well given that these EUV tools are now producing wafers at least 10x slower than immersion tools, I think it will take 10x as long to deploy. Immersion took about 3 years (2003-2006) to go from first prints to production. So I think 30 years (from 2006 at best say) will be about the right time for the same level of maturity, at the current pace. Even if we grant half the required speed in 2012, that still means six years out from there (2018). And the amount of data to be collected for module and mask development is more immense than it was for immersion.
IMEC announced that it exposed its first wafers with the preproduction tool. I don't believe they said how many wafers they exposed. TSMC also has an NXE:3100, as do, apparently other firms (Intel is believed to have an NXE:3100 also). I take it from Meurice's statement that TSMC and/or other NXE:3100 customers have already exposed wafers but have not made a public statement about it.
"...Meurice said that by the middle of this month ASML will have shipped a total of five NXE:3100 tools."
"Earlier this week, IMEC announced that it exposed its first EUV wafers using the NXE:3100."
Where can he get "Several customers having already exposed hundreds of wafers..."?
Blog Doing Math in FPGAs Tom Burke 23 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...