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daleste
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re: IBM, 3M to collaborate on 3-D chip stacking
daleste   9/8/2011 12:57:45 AM
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An extension of existing technology, but I bet they get many patents to keep others out. The thermal problem will be interesting.

RobDinsmore
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re: IBM, 3M to collaborate on 3-D chip stacking
RobDinsmore   9/8/2011 4:32:49 PM
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I am glad that IBM 'makes fun' of Intel's ridiculous 3-D marketing BS. I am also glad that IBM is still investing heavily in research.

docdivakar
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re: IBM, 3M to collaborate on 3-D chip stacking
docdivakar   9/8/2011 5:44:35 PM
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@RobDinsmore: I assume you are commenting on Intel's trigate technology (monolithic 3D) but Intel has also done pioneering work on 3D stacked chips starting 2002! It is true the marketing folks get carried away with what is realistic with all these new technologies but I wouldn't lower that to the BS-level! @daleste: I agree, it is a challenge to develop materials for joining substrates, providing thermal pathways matching the conductivities of Silicon but therein lies the problem. There aren't too many gap filling materials with particle sizes in the order of a few microns. There are some promises in some emerging nano-particle based adhesives that the printed electronics industry seems to be forging ahead with (3M has a good presence there). Dr. MP Divakar

IFTLE
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re: IBM, 3M to collaborate on 3-D chip stacking
IFTLE   9/10/2011 4:49:35 PM
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Most folks call this thermal underfill. Getting one optimized for 3D stacking is certainly a worthy goal.



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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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