With tri-gate and FinFETs the electrostatics are much better. Intel has several presentations on their web site showing the advantages they claim from tri-gate vs. bulk planar- which are generally accepted/acknowledged throughout the device community. Poke around here and see:
Surprisingly (to me), I heard they will not present performance details at IEDM- I guess we can wait and hope for VLSI.
I understood that Intel is introducing FInFET at 22nm while the rest of the industry will wait for 14nm. WIll there be any advantage in terms of the performance that Intel will gain? The advantage of knowing the problems and getting to the solutions first is clear. Does anyone know the reason behind Intel's move to introduce FInFET at 22nm?
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.