I see the same thing with PCB layout tools and the associated schematic capture tool libraries! Every time I start a project I have to weight the cost of using existing models (footprint/schematic) against possibly better parts (or lower cost) and extensive library model development. What ever happened to IC vendors supplying models for their components to the software houses? It adds cost and delays schedules for every new part/package, couldn't the industry ask for standard parts to come with these models? Imagine the savings in time!
My experience in an internal corporate CAD/EDA group parallels yours, Brian! Our collegial customers demanded certain models, and we had to relay those demands to Mentor Graphics, Cadence, Synopsys and various EDA SME's, etc.
As for TLM Central, I will investigate it but from the description here, it reminds me a lot of Design-Reuse from France.
Blog Doing Math in FPGAs Tom Burke 13 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...