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krisi
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re: Debunking the myth of the $100M ASIC
krisi   10/4/2011 2:32:05 PM
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This might be true for large SOC...but you don't have to write any software for a small analog or mixed-signal ASIC...Kris

KB3001
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re: Debunking the myth of the $100M ASIC
KB3001   10/4/2011 12:23:38 PM
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It's about the risk (or perception of risk) rather than the actual cash investment needed. Many things could go wrong in the SoC business and Capital is a Coward...

boblespam
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re: Debunking the myth of the $100M ASIC
boblespam   10/4/2011 12:11:15 PM
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It's the cost of the employee turn over that is pointed out there. As said: slow recruitment and tightly united design team will make your company save time and a lot of money.

Mike.Beunder
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re: Debunking the myth of the $100M ASIC
Mike.Beunder   10/4/2011 8:32:41 AM
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As the graph shows, software has become the dominant cost factor for your hardware - just making the silicon doesn't give you a product, you need the software as well. If you can live of open source, that'll be great but most of the time you'll need to go through significant efforts to create the software required to make the chip into a product. And from there the acceptance of your product is set by the ability of your (potential) customers to get their apps running on your system. In short, putting out the (silicon) hardware is only (less than) half the job.

Neo10
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re: Debunking the myth of the $100M ASIC
Neo10   10/4/2011 3:23:20 AM
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It still is expensive not because it costs $100M but because it requires a team with a large set of skills and they don't come cheap. Even with a budget of tens of millions chips have been made but any further growth and advanced features will sink in more money than you started out with and evetuallu it becomes a successful self sustaining product but by that time your expenses have neary shot up to 2 to 4 times your start up budget.

krisi
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re: Debunking the myth of the $100M ASIC
krisi   10/3/2011 10:46:53 PM
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Good article Andreas, yes, $100M number refers to complex SOC types designed by Intel's, Nokia's and TI's of the world...I know first hand few small, analog ASICs that were developed under $2M, similalrly to the figures you are quoting...but the perception in VC community remains that IC design is very expensive...Kris

Marketing Guru
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re: Debunking the myth of the $100M ASIC
Marketing Guru   10/3/2011 8:45:03 PM
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Andreas, In the real world, very few ASICs require the leading-edge technology that cost up to $100 million to develop. Such applications are limited in their deployment to multi-multi mega-million unit markets. At JVD Inc., we focus on the Analog ASIC market, which, according to research firm IC Insights, constitutes almost 60% of the nearly $37B of Analog ICs sold in 2010. None of these come close to your cost projections…. Typical NRE + Tooling ranges from $250K to $650K, making them affordable to thousands of potential customers. Bob Frostholm

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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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