Yes, the low barrier to entry into DV, and Test generally, allows people who have slipped through the cracks in education, and whose potential has not been developed academically, to find a way to express their talents while earning a decent salary with some job security. Moving up is difficult because who wants to take orders from someone less qualified? The answer is in-service training; get that degree, invest in yourself, maybe get your employer to back you or find one that will. I have met many creative and practical people in Test environments but they are limited by their poor access to education and the tools it provides.
First,tho many of you espouse 70/30, my concern has always been that some design teams get used to not handling all the details of their design as they go. It often puzzles me that the designers themselves don't have their own full chip hierarchical simulation model to design inside of, define/check all of their assertions, and other things they give the other '70-percent' people to do.
I do verification now (and am good at it!), but when I designed A/MS, I didn't really do GOOD designing UNTIL I started really doing the whole design, everything checked, and had documented exactly how it would work in mfg.
But I enjoy doing the '70' work now, as it lets me at times do a little teaching, as well as often changing the design flow so that its easier for the designers themselves to do the '70' stuff. --Steve Grout
Perhaps it has more to do with the mentality of an engineer who wants DV as a career. DV has a relatively low barrier of entry. You are not 1st place in design, but rather viewed more as a resource that follows the genius. DV can be thankless. For ASIC's, if the designer fails, and you identify the error, you get kudo's. If everything passes, the designer did a great job. If you miss the error, you messed up. Not a lot of room to be noticed in the 1st place. Perhaps DO-254 will focus the contributions of DV.
Not sure I'd read too much into DV's glass ceiling, given that the recognition of it's importance ( important enough to have dedicated, seperate teams that treat the DUT as a black-box ) is still relatively new.
Could there be some sort of inversion in the 70-30 rule? That is, we always here that 70% of the effort is in the verification, while only 30% is in the design. What if 70% of the engineers want to do design while only 30% choose the verification path? In that case, what employer is ever going to want that DV engineer leaving the rank and file.
Perhaps it is to do with the mind-set required to be a good DV engineer. Lets assume, contrary to popular belief, that being good at your job leads you upwards in the organisation. A good DV engineer has to look for how things will go wrong, point out the mistakes of others, potentially slow down product release by finding last minute bugs that have to be fixed. (never mind that finding that bug avoids a future and expensive re-spin). In cultures that do not like the word "problem" and prefer to talk about opportunities, it strikes me that this mind set might have difficulties moving upwards.
Or its just that good DV engineers are hard to come by and too valuable to be wasted in management roles and the bad ones just get sacked for missing that critical bug that killed the product ;-)
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.