.."volume commercialization of heterogeneous stacks of processor, memory, mixed-signal, networking and I/O chips formed into silicon skyscrapers as high as 100 chips per stack .." - this is very ambitious goal!!
Generally sounds reasonable, but very skeptical of the idea of liquid cooling. May fine for special application but definitely not for commercial.
An excellent overview of current 3D status and roadmap except for the glaring omission of Allvia - a small foundry located right here in Si Valley that has pioneered TSV technology at a prototype level for the last 5-6 years and provides smaller customers access to this technology. They also have Si Interposers with integrated capacitors.
hm: You're right! Although 3D itself shouldn't affect lifetime (none of our 3D-ICs from 2004 have failed yet), when more circuitry is added the mean time between failures is likely to become unacceptably small. Continual on-chip testing may be the answer.