Very interesting. Since supercomputers are all about mega-multicores, it would seem that there is a tradeoff between designing in more energy efficient cores, vs perhaps fewer cores that are better able to manage unpredictable tasks.
all cortex a9 arm processors have out of order execution and branch prediction already. cortex a15 will also be super scalar. cortex a8 is dual in-order instruction issue. most vendors also include SIMD units in there arm offerings. no much a intel processor has on these except 5-10x perf/watt
High performance computing IS energy efficient computing. At the scale we're talking nowadays, the best way to allow supercomputers to be faster is by reducing their power consumption and heat dissipation. Those are the factors limiting you from throwing in more computing resources.
“It’s a terrific processor for everyday computing, not the right device as we go towards high performance computing,”
His statement seems to redefine high performance computing to energy efficient computing.
Blog Doing Math in FPGAs Tom Burke 12 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...