thank you Paul for an interesting perspective...we are organizing a panel on this topic at CMOS Emerging Technologies conference in Vancouver in 2012 (details at www.cmoset.com), would you be interested in participating on the panel?...we will also be interested in having someone from EE Times and GSA...firstname.lastname@example.org
First of all, I would like to applaud the initiative of finding new sources of funding semiconductor startups. Clearly this industry is facing issues and new solutions are needed. As part of the lively discussion provoked by Dylan McGrath's article, I would like to make a few points.
1. After a good ~ 50 years long run, the semiconductor is maturing (not unlike what happened to the automotive industry). The days of mushrooming semi startups nourished by the multi-million dollars investments from the burgeoning VC firms are gone - get over it! The business has changed and those days are not going to come back. It is a different world now and no amount of nostalgia is going to change that.
2. The old business model of fabless semiconductor companies is dead, for all practical purposes, when it comes to startups and emerging companies (see this presentation: http://www.design-reuse.com/exclusive/kaben/) There is a need for new approaches which have a chance to bring significant ROI justifying investments.
3. Just because the old ways of doing business are no longer applicable, this does not mean there is no need or demand for semiconductor startups and their innovation - quite contrary! But the way we go about it has to be different. To avoid repeating myself, I refer you to this article: http://www.eetimes.com/electronics-news/4074052/Letter-to-the-editor-IP-cars-share-common-ground
"Times they are a-changing" and the GSA's Emerging Company Council's initiative spearheaded by Ralph Schmitt is a welcomed effort which might help to breathe new life into the world of emerging semiconductor startups.
C Paul Slaby, Yariba Tech
Thank you goafrit.
I do not fully comprehend so small manufacturing cost as sources from design are quoting often.
To me cost of verification and especially first silicon debug (test involved) are 40% of cost of development cycle. Quoted 35% on 90 nm.
First silicon debug is practically manual process. Start from clock verification. That requires so called Instruments On a Chip permitting to reach deep into interior of a chip. Next they say broken scan chains are 30% of scan failures.
There are conceivable non-contact wafer level methods to reach inside chip (those are internal test points) which may help to access these things with pretty good bandwidth, extremely small real estate on chip, power draw.
This is to me something, if real, very important.
Lately I followed one start-up and they swayed themselves from non-contact test to protecting environment venture. Anyone knows why ?. RF communication between tester and device (die on wafer) under test has flows. Looked perfect to me. I do not believe they consumed more than 10 millions.
Anyone knows real numbers behind wafer level first silicon debug ?. Thanks
Here's a cost reduced solution: ZYNQ: XILINX Artix7 or Kintex7 28nm FPGA + dual ARM A9's on a chip. As its ecosystem builds out additional software, fpga images and tools, the cost savings for innovation on a standardized and highly capable platform will be significant.
There is a fundamental flaw in this concept: "The startups the fund supports would be modeled to be acquired by their strategic sponsor or another firm."
No engineer/entrepreneur worth his salt would start a company and go through the grueling initial years to be acquired. The engineers who created the value of the start-up rarely if ever make money on an acquisition. Hence, for all start-ups that I knew and have been involved with plan A was going public. Only plan B was acquisition, if all else fails. I would never back any start-up with my work or my money which sets the goal to be acquired when it is started/funded.
The SiliconBlue acquisition is a really interesting data point and shows why the business model no longer works for VCs. Ten years ago, a company like Silicon Blue might have been acquired for $600M. To get more startups funded, the tier-1 semis need to learn how to invest properly in startups or start paying more on exits to get the VCs back in the game. If they do neither, the whole industry will stagnate.
Note, it's still possible to get to break even with $2M, but then you need a customer up front and a very focused product:
Here's a fresh data point for this discussion. Programmable logic startup SiliconBlue was by many measures a pretty successful startup, claiming a number of design wins under the belt. On Friday (Dec. 9) it was acquired by Lattice Semiconductor for $62 million. Not bad, but the company had taken at least $57 million in VC funding. SiliconBlue had customers and was generating revenue, though I do not believe that the company was profitable. So who knows exactly how much return the VCs got on their investment. But on its face, looking at the numbers, it seems hard to blame VCs for believing their money would have gone farther elsewhere.
Software isn't cheap but hardware tools can cost tens of thousands a month to rent or a few hundred grand to buy. Go price out a good logic analyzer, waveform generator, Ghz scope, programmable power supplies etc., outfitting a lab is not for the faint of pocketbook.
The $30M is a good number to use Dylan - not everyone needs 15nm CMOS nodes.We spent a year on Sandhill Rd pitching our semiconductor startup to deaf ears. The VCs were either on planes to/from China, or investing in stupid, yet "capital efficient", website ideas that had no commercialization plan apart from "advertising" (they all want to be Google).
The requirement of having a customer in this semiconductor funding appears to be a way for the established "investor" companies to have their marketing done for them - I doubt they are serious about seeing a startup go to IPO, or even to enable a competitor. Their marketers are clueless, and this is a way for them to get market/customer/strategic insight for less than $10M, nothing more.
Blog Doing Math in FPGAs Tom Burke 14 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...