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old account Frank Eory
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re: Why the semiconductor industry will rise again
old account Frank Eory   1/9/2012 1:56:29 PM
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The industry and the systems our ICs go in need both -- the advanced process geometries for the Big D-Little A SoCs, and the larger geometry boutique processes for the Big A-Little D analog, power and MEMS functions. Miniaturization is still critically important, but there are other ways to achieve it besides making one big die in the latest process -- SIP and TSV for example. There are still plenty of opportunities for fabless startups, but the name of the game is IP, whether digital, analog or electro-mechanical. This has been true for a very long time, ever since the rise of the fabless business model. Startups are by definition fabless and also don't have deep pockets. Show me a startup with valuable new IP and patents to protect it, and I'll show you a potential ROI. But show me a startup whose business plan is based on taping out the next great 28 nm SoC and I'll show you a bunch of dreamers who will never get funding.

BicycleBill
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re: Why the semiconductor industry will rise again
BicycleBill   1/9/2012 12:57:32 PM
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Peter--what you are saying is that success comes from going with analog and MEMS--"we" analog folks knew this all along! Many analog companies have done very well by NOT looking to the next process node for success, but by using older processes to the max--fab is easier to get, less expensive, and plenty of good, used equipment for fab and test is available cheap!

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michigan0 Sang Kim First, 28nm bulk is in volume manufacturing for several years by the major semiconductor companies but not 28nm FDSOI today yet. Why not? Simply because unlike 28nm bulk the LDD(Lightly Doped Drain) to minimize hot carrier generation can't be implemented in 28nm FDSOI. Furthermore, hot carrier reliability becomes worse with scaling, That is the major reason why 28nm FDSOI is not manufacturable today and will not be. Second, how can you suppress the leakage currents from such ultra short 7nm due to the short channel effects? How thin SOI thickness is required to prevent punch-through of un-dopped 7nm FDSOI? Possibly less than 4nm. Depositing such an ultra thin film less then 4nm filum uniformly and reliably over 12" wafers at the manufacturing line is extremely difficult or not even manufacturable. If not manufacturable, the 7nm FDSOI debate is over!Third, what happens when hot carriers are generated near the drain at normal operation of 7nm FDSOI? Electrons go to the positively biased drain with no harm but where the holes to go? The holes can't go to the substrate because of the thin BOX layer. Some holes may become trapped at the BOX layer causing Vt shift. However, the vast majority of holes drift through the the un-dopped SOI channel toward the N+Source,...
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