The issue is not to forget HLS as a whole concept and get lost again in new adventures, but to make existing ESL tools work for the users. E.g. accepting complete program syntax without strange tool directive in the code, and have an executable, silicon-proof specification of software and hardware parts of the system would be a great help for system architects and hardware designers. A proper HLS tool should support complete program constructs in the source code, without altering the program semantics. Also it would be very useful if HLS tools produce HDL which is efficient but also readable, that that it can be used for tracking object names back into the source code. Unfortunately these things are not true with existing academic or commercial HLS tools...
I think it's the business model of those companies that failed them, not the HSL concept or technology per se. You can't make a sustainable business out of licensing HLS tools. An integrated HW/SW/Services approach is more likely to work. SW standardisation is also a must IMO.
So, no one is betting their money on high level systhesis?
The tool with most impact I would think would be in the Formal verification, because they would reduce such a humngous load in the total chip development time but they still seem to be adressing some very narrow design areas and are still hard to understand to the average engineer. Unfortunate to notice that no devlopements are happening towards this end.
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.