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chipmonk0
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re: Wanted: 3-D IC standards within six months
chipmonk0   2/1/2012 11:04:00 AM
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Like every other disruptive technology before it, the development and implementation of 3D stacks using TSVs too will follow the path of least resistance and maximum need / profit margin. Thus the next major application for 3D TSVs would most likely be just memory ( DRAM ) at bandwidths greatly increased by 3D stacking so the memory bottleneck in multi - core processors can be eliminated along with the power wasted due to long interconnect lengths. Servers are waiting for just such memory. I would be very surpised if despite all the hoopla & urgency expressed in this report memory / CPU modules using 3D stacks w/ TSVs appear in smartphones anytime soon. Less radical / risky integration schemes can deliver the bandwidth required for real time video. Unless of course fabless market leaders in ARM based processors are scared of getting upstaged by Samsung, which has built 3D memory w/ TSV and can integrate them more easily to their own ARM based processor in their own Fab.

rick merritt
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re: Wanted: 3-D IC standards within six months
rick merritt   2/1/2012 4:14:26 AM
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I'm thinking this is the future of system design. Anybody else?

GREATTerry
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re: Wanted: 3-D IC standards within six months
GREATTerry   2/1/2012 3:52:06 AM
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With 3D IC design flow being standardized, will the whole industry be revolutionized?

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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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