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re: Analyst: UMC 28-nm roll out beating expectations
krisi   2/13/2012 6:35:31 PM
Isn't high-k dieletcric is only needed for gate leakage? Most of the leakage is between source and drain so the total leakage is not that much different pressumably...Kris

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re: Analyst: UMC 28-nm roll out beating expectations
PV-Geek   2/12/2012 2:17:38 AM
Not doing the HKMG certainly makes things easier. If there are a good number of customers that can live with the leakage then this could be good money for UMC. It all depends on how much volume they can get.

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re: Analyst: UMC 28-nm roll out beating expectations
yalanand   2/11/2012 11:41:10 AM
Interesting to note that UMC had "smoother-than-expected R&D and pilot run," is it because it took precaution while building its 28nm process or was it plain lucky ? I am sure it would have learnt some lessons from TSMC/GF's mistakes when implementing 28nm process.

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re: Analyst: UMC 28-nm roll out beating expectations
chipmonk0   2/10/2012 7:11:54 PM
Does TI not care about the leakage / power dissipation for their OMAP built by UMC with ye olde polysilicon/silicon oxynitride gate stack rather than HKMG like TSMC / GloFo would have at 28 nm LP ? Perhaps this is just a stop gap / get a foot in the door for a OEM ( A?) who can't wait till UMC gets its HKMG ready at 28 nm.

Fab guy
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re: Analyst: UMC 28-nm roll out beating expectations
Fab guy   2/10/2012 3:56:35 AM
Well, their 28nm is a conventional gate stack process (poly Si gate with SiON gate oxide) and a far more sophisticated high-k dielectric and metal gate process which is the main stream for TSMC and Intel, IBM.

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re: Analyst: UMC 28-nm roll out beating expectations
mcgrathdylan   2/10/2012 1:29:17 AM
It's quite interesting that UMC seems to be ahead of schedule at 28-nm when it apparently caused TSMC and GF a lot of headaches.

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