In the system proposed at DEC there were process transaction ID tags sent with memory requests. For example a read request would include the requester process ID along with the address or address range. This would be queued in the memory system and got to when it could. When delivering requested data the memory system would identify who requested it and the particular request.
I was hired by DEC as a Principal Engineer in early 1987 to implement a transactional memory. It was to be dual port to be shared between 2 of their XMI buses. One bus to connected to a Prism RISC and the other to their Lynx graphic pipeline.
The concept was new to me and I found it quite interesting. The project was cancelled because the graphic pipeline design could not meet performance objectives.
Blog Doing Math in FPGAs Tom Burke 23 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...