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green_is_now
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re: Intel confirmed as foundry for second FPGA startup
green_is_now   12/20/2012 12:57:34 AM
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time, 4th dimension, or it ain't 3D

dleske
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re: Intel confirmed as foundry for second FPGA startup
dleske   2/25/2012 5:36:08 AM
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Good description in the article - it makes a lot of sense. Most logic is synchronously clocked. Your approach seems to keep the states latched (in the virtual wires) while the logic is reconfigured to process other signals. The reduced wiring complexity by treating time and space routing as interchangeable is very clever. This offers a level in between standard logic (with gates performing only one function, often idle) and microprocessors (gates being re-used for different functions over time, at lower program speeds). Wishing you the best success with it!

abismuth
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re: Intel confirmed as foundry for second FPGA startup
abismuth   2/25/2012 12:14:16 AM
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A useful way to think of this question of power consumption is to consider two identical functions. One implemented using 8 LUTs each operating at 200 MHz, and the second using only 1 LUT operating at 1.6 GHz. If interconnect capacitance were the same in both cases, then power consumption would be identical. Of course in a 3D device interconnects are shorter, so in fact there’s a power advantage for the second faster implementation.

JJ600
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re: Intel confirmed as foundry for second FPGA startup
JJ600   2/23/2012 7:20:35 PM
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Hi Kris, I like to emphasize the "damn fast in re-configuring your FPGA". Either the reconfiguation clock is very fast (1.6GHz?) or the system clock is very slow. For either case, this 3DFPGA burns much higher power than traditional FPGA's. No perfect solution here.

resistion
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re: Intel confirmed as foundry for second FPGA startup
resistion   2/23/2012 5:28:06 AM
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Wow, clever use of time as third dimension!

krisi
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re: Intel confirmed as foundry for second FPGA startup
krisi   2/23/2012 1:16:59 AM
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thank you @abismuth, fascinating technology: "By storing multiple gate configurations on chip, Tabula’s devices can completely reconfigure their fabrics up to 1.6 billion times per second" any chance someone from Tabula would be interested in presenting it at CMOS emerging technologies event to be held in Vancouver in July? (www.cmoset.com)...I am the conference chair...pls contact me at kris.iniewski@gmail.com

abismuth
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re: Intel confirmed as foundry for second FPGA startup
abismuth   2/22/2012 11:30:39 PM
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Great discussion about how our Spacetime 3D architecture works. If you are interested in knowing more about it you can read this very good article written by Tom Halfhill at Microprocessor Report: http://www.tabula.com/news/M11_Tabula_Reprint.pdf If you have more questions you can also contact me directly or through our website (www.tabula.com).

JJ600
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re: Intel confirmed as foundry for second FPGA startup
JJ600   2/22/2012 4:28:53 PM
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You can imagine that this is like PC with disc cache memory. Theoretically, it could have much larger gate count under a small footprint. However, it affects the performance greatly, also 1.6GHz clock generates a lot of more power than expected, during this "on-the-fly" reconfigurations.

JJ600
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re: Intel confirmed as foundry for second FPGA startup
JJ600   2/22/2012 4:23:32 PM
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This is more like Intel needs business collaboration in the embedded applications. Solely foundry business for this customer (and Achronix also) won't help to boost Intel's revenue.

eewiz
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re: Intel confirmed as foundry for second FPGA startup
eewiz   2/22/2012 4:03:00 PM
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True. why wud intel fab A5/A6 for apple? That wud kill Intels own mobile CPU line.

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