Embedded Systems Conference
Breaking News
Comments
Newest First | Oldest First | Threaded View
Rachael
User Rank
Author
re: Dispelling the myth about analog scaling
Rachael   10/3/2012 4:56:20 AM
NO RATINGS
This is the kind of debate where people argue about semantics. What do you mean by area scaling? Do you mean, "an analog circuit's performance scales similarly to a digital circuit on a logic process with a 0.5x reduction in active device area?" if so, it has been known for a long time that headroom collapse, device noise, variation, and increase in spec (such as VCO gain increase) make this impossible. Analog on advanced logic processes (which Mr Shor's application concerns) has dwelled in a "relaxed" scaling zone where elimination of margin and over-design, and statistical design techniques allow approximately a 0.7 to 0.8x scaling per generation. This is not sustainable and we are already seeing the need to increase power for iso-performance. Now, if you mean, "can an analog system's area be reduced by 50% per generation through optimization, digital assisted design, circuit innovation, etc", the as we have seen the answer is yes for now. We will see big reductions as designs move to the digital domain. I have had the pleasure of designing analog circuits on Intel's lead technology for almost 20 years, but I do not speak for Intel in this forum.

rf_austin
User Rank
Author
re: Dispelling the myth about analog scaling
rf_austin   2/29/2012 3:06:43 PM
NO RATINGS
The message in this article would be much more believable if a complex analog circuit were presented. When Intel gets to the point that it is combining power amplifiers, analog signal conditioning, and frequency synthesizers in a single chip at 22nm, I will stand up and take notice. Until then, this reads like me adding a flip flop to one of my circuits and declaring I'm a digital designer.

kdboyce
User Rank
Author
re: Dispelling the myth about analog scaling
kdboyce   2/23/2012 6:52:14 AM
NO RATINGS
Also, try scaling the SNR and delivered power to the load. It ain't that easy.

truekop
User Rank
Author
re: Dispelling the myth about analog scaling
truekop   2/23/2012 4:51:53 AM
NO RATINGS
I guess dylan needs to get some counseling on what high performance analog design is ....companies like linear tech and ADI wouldnt exist if amplifier/converter design could be done at 32nm...

elPresidente
User Rank
Author
re: Dispelling the myth about analog scaling
elPresidente   2/23/2012 4:23:50 AM
NO RATINGS
Analog does scale. But nobody so far has mentioned that its performance starts to really suck. That's what Shor slyly refers to as "just need to do some optimization". Painting analog with a broad brush from a temperature sensor implementation in a microprocessor, using a 'digital" process is a joke. Intel speaking against TI? Come on, EE Times - who's the analog expert among those two and who is the RTL jockey in terms of credibility? Are there any engineers in da house? All I hear is bleating.

old account Frank Eory
User Rank
Author
re: Dispelling the myth about analog scaling
old account Frank Eory   2/22/2012 9:44:24 PM
NO RATINGS
Analog does scale, but not to the same degree as digital -- and some analog circuits scale better than others. This isn't really a new revelation, although the issues of voltage headroom and matching are no doubt worse at 32 or 22 nm than they were back at 130 or 90 nm.



Radio
LATEST ARCHIVED BROADCAST
As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
Like Us on Facebook
Special Video Section
The LTC®6363 is a low power, low noise, fully differential ...
Vincent Ching, applications engineer at Avago Technologies, ...
The LT®6375 is a unity-gain difference amplifier which ...
The LTC®4015 is a complete synchronous buck controller/ ...
10:35
The LTC®2983 measures a wide variety of temperature sensors ...
The LTC®3886 is a dual PolyPhase DC/DC synchronous ...
The LTC®2348-18 is an 18-bit, low noise 8-channel ...
The LT®3042 is a high performance low dropout linear ...
Chwan-Jye Foo (C.J Foo), product marketing manager for ...
The LT®3752/LT3752-1 are current mode PWM controllers ...
LED lighting is an important feature in today’s and future ...
Active balancing of series connected battery stacks exists ...
After a four-year absence, Infineon returns to Mobile World ...
A laptop’s 65-watt adapter can be made 6 times smaller and ...
An industry network should have device and data security at ...
The LTC2975 is a four-channel PMBus Power System Manager ...
In this video, a new high speed CMOS output comparator ...
The LT8640 is a 42V, 5A synchronous step-down regulator ...
The LTC2000 high-speed DAC has low noise and excellent ...
How do you protect the load and ensure output continues to ...