Why is it surprising? The new finfet technology is such a radical departure from previous tick-tock shrinks that some hiccup is to be expected.
The very original timelines had Ivy Bridge introductions in Q4 11/Q1 12 timeframe, so that would amount to a glitch. Even the mighty Intel is not immune to the challenges of very deep submicron manufacturing. Note this is not a few working die to characterize for publications - this is shipping in volume with the yields that the business is based on - a big difference.
Jim McGregor of In-Stat told EE Times that according to his industry sources in Taiwan, Intel's Ivy Bridge server parts were only delayed from April 8 until April 29, though the dual core i5 and i7 parts for notebooks had been pushed out from a planned May 13th launch to June 3.
Core i3 parts would launch as planned on June 24, said McGregor.
That's three weeks - I am not sure a manufacturing glitch would fixable in 3 weeks considering cycletime is probably on the order of 10 to 12 weeks.
Nobody knows - someone makes an assumption - this will be repeated and than it becomes "news"
Why does not Sylvie digg up the interview or is there no written copy?
A Book For All Reasons Bernard Cole1 Comment Robert Oshana's recent book "Software Engineering for Embedded Systems (Newnes/Elsevier)," written and edited with Mark Kraeling, is a 'book for all reasons.' At almost 1,200 pages, it ...