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DickH
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re: World's first optical FPGA technology demo from Altera
DickH   12/19/2012 9:03:21 PM
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can I make plea for somebody to quote the symbol rate rather than (or in addition to) the bit rate when showcasing these technologies? some info on the modulation schemes employed would be good too

KB3001
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re: World's first optical FPGA technology demo from Altera
KB3001   3/11/2012 10:46:01 AM
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Correct, it's an evolution (a welcome one) but not a revolutionary breakthrough.

amigivati
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re: World's first optical FPGA technology demo from Altera
amigivati   3/11/2012 8:17:46 AM
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it seems like the integration is in the package level, by combining at least 2 chips. This is not a breakthrough in the technology. More of an evolution that a revolution. But definitley this increased level of integration is welcome. We can use any increase in throughput and reduction in BER - it will open up new possibilities.

Sanjib.A
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re: World's first optical FPGA technology demo from Altera
Sanjib.A   3/11/2012 8:10:55 AM
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Nice idea to reduce signal integrity related problems and makes board designer's life easier. Although this could also have been achieved by placing the optical xceivers physically very close to the FPGA on the board to limit the length of the traces to less than half an inch. I welcome the idea as this could be the beginning of technology trend of greater dependency on the programming logic going forward.

Kinnar
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re: World's first optical FPGA technology demo from Altera
Kinnar   3/11/2012 6:48:54 AM
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Altera has made it, this development might bring Altera forward in competition. This will make the FPGAs being widely used in the networking devices, where electronics will control the optics in native mode. In other words we can say "Electronically controlled Optics".

_hm
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re: World's first optical FPGA technology demo from Altera
_hm   3/11/2012 1:57:18 AM
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This is wonderful approach from Altera and Avago. Basic approach is to reduce design complexity and encourage many more designer to integrate high speed serial technology in many more products. I wish to see many application solved by this device.

gnuarm
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re: World's first optical FPGA technology demo from Altera
gnuarm   3/10/2012 4:44:51 PM
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I don't think this is either new or novel. I have seen this described about ten years ago. The problem has always been that the logic is in Silicon and the optical is in some other semiconductor. So they have to have I/O interconnect which adds parasitic capacitance and inductance degrading high speed signals. They may have reduced this by using bumped die packaging rather than bond wires, but I don't think they have really broken new ground. Did anyone notice the speed vs. error rate? 10^11 bits per second data rate and better than 10^-12 error rate. That means nearly an error every 10 seconds. I assume this would be handled by a good protocol, but it seems like maybe we need to bump up the requirements for such fast interconnect.

Max The Magnificent
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re: World's first optical FPGA technology demo from Altera
Max The Magnificent   3/9/2012 1:48:54 PM
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With regard to Xilinx -- I can;t speak for them and I have no advanced knowledge -- but take a look at their 2.5D FPGAs in which four FPGA die are mounted on a silicon interposer in the same package -- and the silicon interposer provides around 10,000 silicon-speed connections between each adjacent pair of FPGA die .... now suppose you replace one of the FPGA die with an optical interconnect subsystem...

Max The Magnificent
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re: World's first optical FPGA technology demo from Altera
Max The Magnificent   3/9/2012 1:45:37 PM
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All good questions. Let's look at it this way -- in 1000 years do you think we will still be using silicon-based chips with copper interconnect on our PCBs ... how about 100 years? If we come closer to home, I bet that in 10 years a lot of the higher-end chips and subsystems (microprocessors, memory, etc) will be using optical interconnect.

Patk0317
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CEO
re: World's first optical FPGA technology demo from Altera
Patk0317   3/9/2012 1:24:18 PM
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Wonder what other companies will pick up on this scheme? Will it be limited to FPGAs? Where is Xilinx in all of this?

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