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re: Opinion: Using GPUs to accelerate EDA applications
docdivakar   5/11/2012 6:09:10 AM
Existing (not optimally parallel) EDA tools can still exploit the operating system to benefit from parallelism. Examples abound, like the pattern-based DRC; in the TCAD area, computational lithography, etc. MP Divakar

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re: Opinion: Using GPUs to accelerate EDA applications
urital.rocketick   5/7/2012 5:31:01 AM
Hi TingLu, FPGA-based accelerators enable to run chip designs at MHz speeds and to debug system-level scenarios in the lab, but they are not simulators. It is just a different product category. Pros: - You can reach 1-10MHz speeds with them and therefore debug your driver and even your application in embedded systems Cons: - They are very expensive. - Require significant ramp-up time, and then if you change your code or libraries you are not really debugging your real silicon design - Does not work alongside your existing test-bench (verification environment), and if it does you cannot reach MHz speeds. - Limited in capacity (to scale you need to add more FPGAs/boxes but then you trade-off with speed) - Lack support for non-synthesize-able code - No support for 4-state logic - Lack full visibility - Long compilation time (require to synthesys and place-and-route)

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re: Opinion: Using GPUs to accelerate EDA applications
TingLu   5/7/2012 4:17:38 AM
Simulation acceleration has been dominant by FPGA. I am wondering how well it is compared with GPU.

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re: Opinion: Using GPUs to accelerate EDA applications
Les_Slater   5/6/2012 1:20:21 AM
The problem of rethinking algorithmic foundations is an interesting one. This needs to be taken on as a general formality of a geometry of problem space.

Karl Fergusen
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re: Opinion: Using GPUs to accelerate EDA applications
Karl Fergusen   5/3/2012 7:05:05 PM
We started using Jacket a few months ago to accelerate MatLab codes at L-3 on the GPU. Awesome speedups!

As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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