In the university we worked (and they still do) on a similar approach for partial reconfiguration through the ICAP but that was handeled entirely by the FPGA itself. The maximum clock frequency for the ICAP was achieved with little FPGA resources consumption.
Seems to me that the tools have a long way to go to make dynamic reconfiguration something that most designs will be able to do. For example, the need to have the decoupling logic explicitly defined (if I'm reading the article correctly) is the type of thing I would expect to be handled automatically.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.