In the university we worked (and they still do) on a similar approach for partial reconfiguration through the ICAP but that was handeled entirely by the FPGA itself. The maximum clock frequency for the ICAP was achieved with little FPGA resources consumption.
Seems to me that the tools have a long way to go to make dynamic reconfiguration something that most designs will be able to do. For example, the need to have the decoupling logic explicitly defined (if I'm reading the article correctly) is the type of thing I would expect to be handled automatically.
NASA's Orion Flight Software Production Systems Manager Darrel G. Raines joins Planet Analog Editor Steve Taranovich and Embedded.com Editor Max Maxfield to talk about embedded flight software used in Orion Spacecraft, part of NASA's Mars mission. Live radio show and live chat. Get your questions ready.
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