"Bohr did not provide further details about its 14nm technology, but he reiterated the company’s previous position that extreme ultraviolet (EUV) lithography will not be ready in time for the 14nm node. In previous reports, Intel said it plans to extend traditional 193nm optical lithography down to 14nm, with the help of quintuple patterning and other techniques."
So now it appear those complaining about double patterning are really shy of process discipline, compared to Intel.
Intel has been using alternating phase shift masks starting at 65 nm. This is already a double exposure involved. Add pitch double patterning, looks like they got multiple patterning on their hands already.
They must be the exception if everyone using foundries is only starting to talk double patterning at 20 nm.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.