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daleste
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CEO
re: Deconstructing complex semiconductors layer by layer
daleste   7/6/2012 2:57:42 AM
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This is cool stuff. Delayering a modern IC can be a very difficult task. To be able to trace and understand the circuit is amazing. It must be very time consuming to do this.

old account Frank Eory
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Rookie
re: Deconstructing complex semiconductors layer by layer
old account Frank Eory   7/6/2012 10:09:47 PM
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This is a fascinating topic, both for those who engage in such reverse engineering and for those who wish to protect against it!

sudo
User Rank
Rookie
re: Deconstructing complex semiconductors layer by layer
sudo   7/9/2012 7:16:55 AM
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Oh, doesn't this bring me back memories! Part of my diploma project at uni was reverse engineering blocks of a video chip. I spent ours of etching and photographing, watching the chip doing its little striptease under the microscope. Then, putting it all together, into a circuit. Of course, back then it was mostly about look-up tables and sprites were the bee's knees. I think the minimum line width was 4-5um on the chip and I don't quite remember but I think it had one layer of metal and one layer of poly. Back then, my "Electronic Devices" lecturer at uni was explaining to us how semiconductor physics would break down under about 1um. In any case, lithography would hit a brick wall, for sure! :-) Now, with 11nm around the corner and talk about feature sizes down to 5nm, I think those worries were a bit premature!

chipmonk0
User Rank
CEO
re: Deconstructing complex semiconductors layer by layer
chipmonk0   7/10/2012 3:04:43 PM
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Chipworks( also from Canada ) has been a long established reverse - engineering company and always seesms to score first. Like they were the first to publish x-section of Intel finFET and showed the sloping side walls. Just last week they posted the first application of wide I/O memory in a consumer product ( Sony Vita ). And many more. Good Luck to Techinsights. The more the merrier. Let the games begin.



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