Boeing and Airbus planes were amazing feats of engineering some decades ago and are still around today because there is a need for flying. I think an EUV and Ebeam technology can be the semiconductor equivalent. There will always be a need for high volume IC manufacture so who cares if they are late or unable to improve on moore's law. Once they are ready, they will be in operation for decades until some totally new technology comes along.
Meanwhile, whether more Moore or less Moore, EUV remains SXPL. Soft x-ray projection lithography is still x-ray, despite the EUV nom de plume. If EUV ever gets to 50WPH, it will have a modest role in logic. ASML will happily sell scads of immersion tools for pentuple or sextuple, etc. patterning. Keep an eye on imprint for NVM, either advanced NAND or crossbars. It has a compelling virtue: cheapiness.
I think many of us are getting the bigger picture that at some point in the next several years Moore's law will likely break from a strictly brute force scaling approach.
Then some "More than Moore" set of technologies has to kick in where simple scaling leaves off. Intel's adoption of the trigate transistor is one example.
So what everyone is not getting is the big picture. This is how Moores Law dies. At some point some mundane process step will halt process development which will halt scaling which will ripple throughout the entire tech sector. Because the entire tech sector has relied on more transistors for less power in less space for 60+ years, when this stops, the tech sector will have nothing new to offer customers. The painful consequences of this will become apparent to us all soon. By the way it is interesting Intel appears to be aware of this and is setting up to grap a big chunk of the FPGA and network processor markets among others. See as this unfolds it is better to get a larger share of a shrinking market.
I found some info on perhaps how equipment vendor see it
"At SemiCon last year, all of the panels and talks on 450mm wafers said the same
thing, the industry is moving there together. Some predicted this would be at 14nm, others are saying 10nm, but no one questioned that the major players would all have to move at once. That panel included high ranking Intel process
personnel as well as other industry giants. If the industry decides that 14nm is the transition point for 450mm, everyone will be making 14nm chips on 450mm wafers, 10nm if that ends up being the consensus. What is clear is that no one will be doing a 450mm wafer a node earlier that the rest.
Why? Because the tools vendors all said that once the crossover point is agreed
upon, they will only make tools for that node that use 450mm wafers, the market
isn’t big enough to sustain both 300mm and 450mm variants of the same device. "
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.