I'm amazed that ASML can continue to miss scheduled milestones in EUV litho and have any credibility left. I understand that they are not directly responsible for the source problems, the resist issues, the whole EUV mask infrastructure, etc. But forgive me if I don't have much faith in this four year throughput projection. I know ASML believes that 70 wafers per hour is good enough for adoption for high volume manufacturing, but I question that assertion as well.
@any1- I hear you. At a certain point it gets to be like the little boy who cried wolf. But in defense of ASML and everyone involved, what they are attempting to do is really difficult.
Have the pushouts resulted in some tarnished credibility? Probably a little bit. But I don't believe ASML would continue to spend millions of dollars on development and offer new targets for production if they didn't believe they would get there eventually. And I don't think Intel would have opened up its wallet if it wasn't presented with convincing evidence.
On the 70 wafers per hour being good enough, you may be right about that. But from what I heard last year at BACUS, I think that at this point chip makers would be more than happy with that as a starting point. Note that Meurice is now saying 125 wafers per hour by 2016, and that will I am sure be workable.
All this said, I do agree that the jury is still out on EUV.
Yes EUV is difficult - no question. But we've been at this several years now. You would think that at some point the estimates of future progress would become more realistic. Maybe you would even err on the side of caution so you could actually meet a milestone, or heaven forbid even beat one. I like ASML, and I think they make some great products, but ASML has been much more successful at marketing EUV than actually delivering on the technology.
except that Intel is already having to think about double-dpouble (quadruple) exposure which ends up being very costly in terms of dwell time on the machine.
But ultimately you may be comparing double exposure EUV that is expensive and quadruple exposure that doesn't work.
Boeing and Airbus planes were amazing feats of engineering some decades ago and are still around today because there is a need for flying. I think an EUV and Ebeam technology can be the semiconductor equivalent. There will always be a need for high volume IC manufacture so who cares if they are late or unable to improve on moore's law. Once they are ready, they will be in operation for decades until some totally new technology comes along.
The 2014 to 2016 are low through and not economical. Even it ASML hits 2016 wafer throughput targets (and there is no track record)...
Not much after 2016 450mm is suppose to come in (per same source ASML)
So I don't get the roadmap. 300mm EUV production for 2016-2018 then 450mm.
No way the industry is going to adopt 300mm EUV for just 2 years. No ecomonic benefit (increases cost not lower it).
Please pin these guys down on what exactly is their credible roadmap they are pushing !
I don't see things quite the way you do.
300-mm EUV will last a lot longer than 2 years.
ASML will start on 300-mm for EUV and then as and when Intel wants it they will (supposedly) also supply EUV machines able to process 450-mm wafers.
But they will carry on with 300-mm EUV because not everyone will move over to 450-mm.
Intel will followed by TSMC and Samsung but others could go 450-mm later.
Peter, we will see.
I just don't see equipment industry supporting 300mm and 450mm at the same node 10nm? for what 4 customers.
1 customer intel on 450?
3 customers on 300?
2 on each?
There is just too much work getting 2 tool to production level quality (particles, process uniformity etc.). Supporting repairs on both tools, etc.
Market is too small to support this double cost (in my opinion)
I think if 450 happens, at say 10nm ..I bet equipment suppliers like ASML will only develop one type of tool for the 10nm node specs.
I found some info on perhaps how equipment vendor see it
"At SemiCon last year, all of the panels and talks on 450mm wafers said the same
thing, the industry is moving there together. Some predicted this would be at 14nm, others are saying 10nm, but no one questioned that the major players would all have to move at once. That panel included high ranking Intel process
personnel as well as other industry giants. If the industry decides that 14nm is the transition point for 450mm, everyone will be making 14nm chips on 450mm wafers, 10nm if that ends up being the consensus. What is clear is that no one will be doing a 450mm wafer a node earlier that the rest.
Why? Because the tools vendors all said that once the crossover point is agreed
upon, they will only make tools for that node that use 450mm wafers, the market
isn’t big enough to sustain both 300mm and 450mm variants of the same device. "
I do agree that is the other wild card industry is not honest about.
Even if all the technical EUV problems are solved, just as likly at 10nm designers may not be able use use metal system (resistance too high) or transistor electrical characteristics too poor to be usable.
I think it is very clear the economic advantage of scaling is diminishing fast.
In fact we already see that at 20nm today. It is not delievering much cost, performance or power improvement over 28nm.
14/10nm can be made but companies that produce chips at these nodes will likly be no better and perhaps worse off than producing chips at 20/28nm.
So what everyone is not getting is the big picture. This is how Moores Law dies. At some point some mundane process step will halt process development which will halt scaling which will ripple throughout the entire tech sector. Because the entire tech sector has relied on more transistors for less power in less space for 60+ years, when this stops, the tech sector will have nothing new to offer customers. The painful consequences of this will become apparent to us all soon. By the way it is interesting Intel appears to be aware of this and is setting up to grap a big chunk of the FPGA and network processor markets among others. See as this unfolds it is better to get a larger share of a shrinking market.
I think many of us are getting the bigger picture that at some point in the next several years Moore's law will likely break from a strictly brute force scaling approach.
Then some "More than Moore" set of technologies has to kick in where simple scaling leaves off. Intel's adoption of the trigate transistor is one example.
Meanwhile, whether more Moore or less Moore, EUV remains SXPL. Soft x-ray projection lithography is still x-ray, despite the EUV nom de plume. If EUV ever gets to 50WPH, it will have a modest role in logic. ASML will happily sell scads of immersion tools for pentuple or sextuple, etc. patterning. Keep an eye on imprint for NVM, either advanced NAND or crossbars. It has a compelling virtue: cheapiness.
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