A business contact described tsmc technology roadmap as follows:
1. 28nm is the key advanced node for volume production (tsmc 28nm capacity ramp will be ~150,000 wafers/month by E2013. Might be expanded to 200K E2014)
2. 20nm will be smaller (20nm capacity in Tianan E2016 ~50K wafers/month). less interest do to cost of double patterning 64nm metal
3. 16nm is really Finfet with 20nm like design rules since EUV is not ready and triple patterning is too costly for 45nm metal. Since there is no die size reduction and wafer price is 20-30% higher...they don't see mobile market adopting and hence foundry will not really ramp 16nm until/if EUV or EB is ready?2018?
so after 20nm ... no cost reduction for several years and a slow down in moores law
It is very interesting to see that the silicon process at the foundry is now being optimized for a particular microprocessor architecture. However, it is not clear to me what that exactly entails. Will another processor vendor not being able to take advantage of the same process when fully developed? Kris
I am not sure it is being optimized for one microprocessor architecture.
It is more like TSMC is using ARM to make sure the process works with real-world designs. They have to check it against something and ARM is prepared to make the IP available, put in the engineering hours and so.
The advantage to ARM is speed to market for its customers. But I am sure the process will run MIPS, for example, or could be tweaked for MIPS thereafter and relatively quickly.
thank you Peter, if that is the case then it is business is as usual and the announcement doesn't mean much...TSMC was always asking their leading customers what to build next, I remember that from 15 years back dealing with them, they would be silly not to do so (unless they would prescribe to Steve Jobs's approach of not listening to what the customer wants as the customer doesn't really know what it wants ;-)...Kris