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resistion
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re: Intel sees quad-patterned path to 10-nm chips
resistion   9/14/2012 11:44:07 PM
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Around 10 nm, you cannot merely have a radically new technology come in for one area but a whole package of technologies needed for devices, interconnect, etc. Plus we are now at the scale of electron mean free paths.

Code Monkey
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re: Intel sees quad-patterned path to 10-nm chips
Code Monkey   9/14/2012 4:04:13 PM
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This is important work. If Moore's law ends and software's corrolary to Moore's law (code size doubling every two years) keeps trucking, we're doomed.

song-chou-1
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re: Intel sees quad-patterned path to 10-nm chips
song-chou-1   9/14/2012 2:05:04 PM
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Yes, question is not if 10nm can be done but what economic advantage does it bring after spending Billions and Billions of $. With 80nm pitch used for 22nm that would mean ~40nm metal pitch for 10nm. There is no cost effective way to print. Plus even if lithography breakthrough, parasitic capacitance and line resistance are going to be so large chips will be slower and higher power.

any1
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re: Intel sees quad-patterned path to 10-nm chips
any1   9/14/2012 1:09:43 PM
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I have no doubt that Intel can get to 10 nm with quadruple patterning, but will they be able to suppport a reasonable business model once they get there? And what happens after 10 nm? Is that the end of scaling unless and until EUV litho kicks in at reasonable cost?

agk
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re: Intel sees quad-patterned path to 10-nm chips
agk   9/14/2012 7:35:22 AM
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A good research and with targets like reducing cost per transistor every year.

seaEE
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re: Intel sees quad-patterned path to 10-nm chips
seaEE   9/14/2012 2:37:44 AM
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10nm...looks like we are on the verge of things getting very interesting.

resistion
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re: Intel sees quad-patterned path to 10-nm chips
resistion   9/13/2012 9:34:11 PM
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I'm just wondering if they made changes already. At the VLSI symposium this year, a 60 nm fin pitch was mentioned, for example. And previously, 10/11 nm by immersion was said to require five masks.

rick merritt
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re: Intel sees quad-patterned path to 10-nm chips
rick merritt   9/13/2012 4:08:47 PM
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In his talk, Bohr said many features in the 22nm process use 80 pitch features, a size chose for this generation because they can be single patterned. He did not say anything about double patterning at 22nm or quintuple patterning on any process.

resistion
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re: Intel sees quad-patterned path to 10-nm chips
resistion   9/13/2012 11:51:18 AM
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Aren't the 22 nm fins double-patterned already? Previously didn't they say 10 nm was quintuple-patterned?

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