Mike Bruzzone is fm IBM PC Board add onís; Turbo, Memory, Network Card, 1st 2.5 D PC AT graphics card, 33 PC introductions including fastest 386 33 class workstation on memory write back; co host 1990 SIGGRAPH, first PC Standard MP C&T Corallary Chip set, first not Intel 387 math coprocessor, first not Intel 486SLC/486DLC, 486S Intel substitute microprocessors, first Nx586 replacement platform, first 16 bit bus 32 bit core Mini RISC, first 32 bit performance Mini RISC SOC, first I frame editor, first fast486120, some Alpha&NT, first low power C6 desktop & first less than $1,000 PC. Current research tracks include economics of fabrication; member Silicon Valley Round Table, intersection x86 & ARM, HPC/GPU/APU, resistive RAMs & advanced non volatile memory structures.
Mike Bruzzone is an Intel competitive strategist specializing in not Intel product commercialization who is invited discovery technical assistant by Federal Trade Commission Bureau of Competition for FTC v Intel Docket 9288, lettered to work report Assistant AG Antitrust Division of the State of California Department of Justice for defining Sherman Act Section One violation, a EUCC domestic U.S point of contact Monti/Kroes/Martinez Commissions, SEC recognized Relator by letter, Federal False Claims Act Original Source by letter U.S. Attorney Northern California District, recognized Relator Intel monopoly procurement theft in fifty States, four territories and the District of Columbia, invited discovery technical assistant FTC Chairman Referral back into Bureau of Competition Docket 9341, FBI original source of Intel Dealing Cartel 1996.
Criminal sub groups operating in Intel have in past positioned detractors as mentally ill, including their own employees up high in the enterprise who question Intelís invented reality in pursuit of error correction, remedies, maintenance of democratic capitalism & industrial social responsibilities. For consultancy inquire firstname.lastname@example.org
For the time being, 28 nm foundry has closer density to Intel 22 nm than 32 nm. But the addition of the fins could offset any cost benefit initially. Foundry 20 nm vs. Intel 14 nm would be where process efficiency is really important.
Blog Doing Math in FPGAs Tom Burke 14 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...