Intel's 22 nm transistor density won't be better than foundry 28 nm, because the fin increases minimum width to at least 90 nm. The fin pitch has to be at least halved, where double patterning is not enough. So I think cisco would still need to get on the 28 nm lines at all the foundries.
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.