Intel's 22 nm transistor density won't be better than foundry 28 nm, because the fin increases minimum width to at least 90 nm. The fin pitch has to be at least halved, where double patterning is not enough. So I think cisco would still need to get on the 28 nm lines at all the foundries.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.