The XMOS chips are a nice architecture, but they suffer greatly from a lack of memory. There is just 64K per core for both program and data, and no sensible way to connect external memories (you can make a memory interface in software, but that uses up most of the pins and resources on the device!).
With at least 512 KB ram per core, and preferably with flash for bootloading on chip, these would be far more useful devices.
You make a good point about lack of memory.
CEO Nigel Toon indicated that more components are in the pipeline, but did not wish to tip his hand about what is coming in the next three to six months.
So maybe XMOS is addressing that with a respin of silicon - or perhaps not. We wait to find out.
Well, I know they have been active in bringing out new devices - the most recent ones having a USB 2.0 PHY integrated in the chip.
However, there are least some architectural and software issues involved in using more than 64KB memory, so it is not quite as simple as putting a bigger SRAM macro in the design. So I'm not going to put money on bigger ram blocks in the next versions - but I would definitely like to see it in the future.
The other big problems I see with the XMOS lie with their development tools and the limitations of the "XC" language. But it is quite possible that this has changed now with the new tools they have released - I haven't tried them, and it would be unfair to complain about old problems before checking if they are now fixed.
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists from incubators join Peter Clarke in debate.