Breaking News
Comments
Newest First | Oldest First | Threaded View
<<   <   Page 2 / 2
chipmonk0
User Rank
CEO
re: TSMC taps ARM's V8 on road to 16 nm FinFET
chipmonk0   10/17/2012 3:48:22 PM
NO RATINGS
Rick : Couple questions about the TSMC 2.5-D Test vehicle you have reported. What was the footprint of the whole thing ( with 4 chips ). Did they give any reason why such a 2.5-D module will be better than current modules / packages used in Smart Phones / Tablets ? Thx

any1
User Rank
CEO
re: TSMC taps ARM's V8 on road to 16 nm FinFET
any1   10/17/2012 1:50:22 PM
NO RATINGS
Double patterning does add a significant amount of complexity to the entire process. And those companies that can do it well will be rewarded. This is where the more vertically integrated companies like Intel and Samsung have an advantage since they can control everything in house. I'm amazed that the foundries like TSMC can execute as well as they do now. But integrating FinFETs, etc. will only make it even more complex to manage in the future. Getting first pass success will become more difficult, and the number of designs at the leading edge will become fewer. Both of these trends are being acclerated by the requirements (costs) of double patterning.

resistion
User Rank
CEO
re: TSMC taps ARM's V8 on road to 16 nm FinFET
resistion   10/17/2012 12:56:10 AM
NO RATINGS
Intel has used double-exposure techniques for its alternating PSM patterning for the poly gate layer starting at 65 nm. Probably multi-patterning on a few layers should be nothing to them now. The question is if they can handle additional layers such as metal 2/3 requiring double patterning.

rick merritt
User Rank
Author
re: TSMC taps ARM's V8 on road to 16 nm FinFET
rick merritt   10/16/2012 11:31:30 PM
NO RATINGS
I'd love to hear any real world experiences dealing with chip designs that use double patterning. I hear it ain't easy.

<<   <   Page 2 / 2


EE Life
Frankenstein's Fix, Teardowns, Sideshows, Design Contests, Reader Content & More
Glen Chenier

Engineers Solve Analog/Digital Problem, Invent Creative Expletives
Glen Chenier
4 comments
An analog engineer and a digital engineer join forces, use their respective skills, and pull a few bunnies out of a hat to troubleshoot a system with which they are completely unfamiliar. ...

Max Maxfield

What's the Best Traveling Toolkit?
Max Maxfield
23 comments
A few years ago at a family Christmas party, I won a pocket knife as part of a "Dirty Santa" game. This little scamp was a Buck 730 X-Tract. In addition to an incredibly strong and sharp ...

Rishabh N. Mahajani, High School Senior and Future Engineer

Future Engineers: Don’t 'Trip Up' on Your College Road Trip
Rishabh N. Mahajani, High School Senior and Future Engineer
10 comments
A future engineer shares his impressions of a recent tour of top schools and offers advice on making the most of the time-honored tradition of the college road trip.

Larry Desjardin

Engineers Should Study Finance: 5 Reasons Why
Larry Desjardin
42 comments
I'm a big proponent of engineers learning financial basics. Why? Because engineers are making decisions all the time, in multiple ways. Having a good financial understanding guides these ...

Top Comments of the Week
Flash Poll
Like Us on Facebook
EE Times on Twitter
EE Times Twitter Feed

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)