95% -- I'll take that! Your point about extra resources, though, is quite valid, Brian. Any embedded instrument will consume FPGA resources; there is truly no free lunch.
I will say that we rarely see this issue in practice, as we tend to "fill-in-the-gaps" of left over LUTs rather than causing a re-partioning of the design. Still, it is an important point.
As we unveil EE Times’ 2015 Silicon 60 list, journalist & Silicon 60 researcher Peter Clarke hosts a conversation on startups in the electronics industry. Panelists Dan Armbrust (investment firm Silicon Catalyst), Andrew Kau (venture capital firm Walden International), and Stan Boland (successful serial entrepreneur, former CEO of Neul, Icera) join in the live debate.