An interesting idea and really helpful. What would be the differences of this flow compared to the flow when RTL VCD along with gate-level netlist is loaded into Primetime PX and tool propagates RTL activities into gate nodes?
The first big difference is that at the end of the suggested flow you have waveform file that you can use for other needs too (and other tools too)…
Also – while working with PTPX with RTL VCD you must make sure that only Flip-Flops are mapped between RTL to netlist. Usually more than Flip-Flops are mapped, and since the RTL simulation is zero delay simulation, the propagation is not done well (and the results are not accurate). It is mostly critical and problematic around adders and multipliers, but not only.
The suggested flow can overcome partial design – RTL which contain stubs or other testbench that replace part of the RTL. You can’t overcome this in PTPX.
In general – you must be PTPX expert to be able to run with RTL VCD, and it is not accurate. In the SpringSoft flow anyone can generate netlist VCD/SAIF, and no need to be an expert to run it on PTPX.
Another issue – PTPX runs in this mode taking too much time. While generating GTL waveform in the new flow took about 1 hour, and the total power estimation was 2 hours, using this on PTPX (when it can be done) took more than 24 hours.
What are the engineering and design challenges in creating successful IoT devices? These devices are usually small, resource-constrained electronics designed to sense, collect, send, and/or interpret data. Some of the devices need to be smart enough to act upon data in real time, 24/7. Are the design challenges the same as with embedded systems, but with a little developer- and IT-skills added in? What do engineers need to know? Rick Merritt talks with two experts about the tools and best options for designing IoT devices in 2016. Specifically the guests will discuss sensors, security, and lessons from IoT deployments.