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sframboss
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re: Slideshow: A brief history of memory
sframboss   11/29/2012 10:21:45 PM
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Ferroelectrics, a "new" non-volatile memory technology on today's scene, actually competed for the "core" memory of new processors in the 1950's. See the work of J. R. Anderson of Bell Labs: [ J.R. Anderson, "Ferroelectric Material Storage Element for Digital Computers and Switching Systems." Electrical Engineering, Vol. 71, pp. 916-922, October, 1952. ], Charles S. Pulvari of the Catholic University of America: [ AIEE-IRE '53 (Western) Proceedings of the February 4-6, 1953, Western Computer Conference Pages 140-159, ACM New York, NY, USA ©1953 ], and Dudley A. Buck at MIT: [ Dudley A. Buck, "Ferroelectrics for Digital Information Storage and Switching", Report R-212 a Master's Thesis, May 16, 1952, MIT ]. Their devices used bulk ceramic capacitors, not thin films so they required hundreds or even thousands of volts to switch the capacitors. Something old! Something new!

EREBUS0
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re: Slideshow: A brief history of memory
EREBUS0   11/29/2012 8:32:51 PM
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Memory and disk space will both expand to overflow existing technology. At the time Bill made his statement, few of us had ever used more than 64K bytes of memory. It was only after memory prices fell that the great explosion began. I remember when 8K by 16 bits cost $1/bit. Compare that to today's costs and you can see why Bill assumed the growth of memory would be limited. By the way, I have a 16K by 16 bit ferrite bead board framed in my living room as an example of the past example of memory technology.

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As data rates begin to move beyond 25 Gbps channels, new problems arise. Getting to 50 Gbps channels might not be possible with the traditional NRZ (2-level) signaling. PAM4 lets data rates double with only a small increase in channel bandwidth by sending two bits per symbol. But, it brings new measurement and analysis problems. Signal integrity sage Ransom Stephens will explain how PAM4 differs from NRZ and what to expect in design, measurement, and signal analysis.

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