Yes that's true by old school thought, but actually 28 nm and below, there are substantial material changes on all critical layers, plus litho constraints, you can't just work with any drawing you have.
how so resistion, perhaps i don't understand your meaning/reasoning there ?
lets say you have a given IP (Intellectual Property) for a generic SIMD engine with the same throughput as Neon, then as the node shrink's you can fit more interconnected engines together, and so less limited not more.
you may want to give better discount's per cluster of SIMD engine as it shrinks to make your version more popular than the competitors in the global markets rather than the old school fixed pricing etc.
The IP strategy will be a tough, tough row to hoe... But remember, they're pretty much attached to Intel's hip and that's probably, long term, where the ip makes sense... especially as guys like Mark Bohr are saying the fabless model is dead.
Good questions. At this point, Achronix is not naming names in terms of its potential customers or potential licensees.
But there appear to be demands for their physical chip. Who would be the first embedded FPGA IP licensee would be an interesting story to follow.
Blog Make a Frequency Plan Tom Burke 17 comments When designing a printed circuit board, you should develop a frequency plan, something that can be easily overlooked. A frequency plan should be one of your first steps ...