I am somewhat uncomfortable pointing this out, but the Stanford/Monolithic3D/Rambus IEDM paper (14.2) about heat extraction has absolutely nothing to do with TSVs. It talks about heat removal using inter-layer-vias of the Power Delivery Networks in monolithic 3D devices that have no TSVs. Just sayin'
The paper on reliability discussing the "Effect of Local Deformation Caused by Cu-TSVs..." has important implications to the placement of TSV's and the keep-out rules. This is something that is still developing and has many process-dependent influences (via middle or via last etc.) as well as type of stacking (die to die vs. wafer to wafer) and the die thickness.
Regrettably I could not attend IEDM this year but would be great to see more review articles as Kris also comments above.
Blog Doing Math in FPGAs Tom Burke 24 comments For a recent project, I explored doing "real" (that is, non-integer) math on a Spartan 3 FPGA. FPGAs, by their nature, do integer math. That is, there's no floating-point ...